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783484-01

The PXIe-7820R is a PXI R Series device with 128 DIO, Kintex 7 160T FPGA, supporting LabVIEW FPGA and peer-to-peer streaming.

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    Description

    The PXIe-7820R is a high-performance digital input/output module belonging to the PXI R Series, with the part number 783484-01. This module is designed to leverage the capabilities of the Kintex 7 160T FPGA, providing advanced digital processing in a compact, flexible form factor.

    With 128 digital I/O (DIO) channels, this module offers extensive connectivity options for a wide range of applications. It is optimized for use with LabVIEW FPGA, allowing for easy integration and custom programming to meet specific user requirements. The PXIe-7820R supports peer-to-peer streaming, enabling high-speed data transfers between modules without taxing the system processor.

    The module boasts a minimum I/O pulse width of 6.25 ns and a minimum testing period of 5 ns, ensuring precise timing and control for critical applications. Additionally, it features external clock direction input support, allowing for synchronized operations across multiple devices.

    The maximum input leakage is specified at ± 15 μA, and the characteristic impedance is 50 Ω, ensuring reliable and consistent performance. The power-on state is set to Tristate 1, indicating that the digital I/O lines are in a high-impedance state by default, which helps in preventing unintended signals during startup or shutdown.

    This module is specifically designed to meet the needs of demanding applications requiring high-speed digital I/O operations, offering a robust, scalable solution for a variety of testing, control, and prototyping scenarios.

    Specification Detail
    Part Number 783484-01
    Category PXI R Series
    Model PXIe-7820R
    Description PXIe-7820R R Series Digital I/O Kintex-7 160T
    FPGA Kintex 7 160T
    Digital I/O (DIO) 128 DIO
    Software LabVIEW FPGA
    Peer-to-Peer Streaming Supported
    Minimum I/O Pulse Width 6.25 ns
    Minimum Testing Period 5 ns
    External Clock Direction Input Supported
    Maximum Input Leakage ± 15 μA
    Characteristic Impedance 50 Ω
    Power-On State Tristate 1 (Tristate by default of 2 NI recommends limiting long-term over/under-voltage exposure to the Digital I/O)

    Question 1: What is the part number of the PXIe-7820R?
    Answer 1: 783484-01

    Question 2: How many DIO channels does the PXIe-7820R have?
    Answer 2: 128

    Question 3: Which FPGA is used in the PXIe-7820R?
    Answer 3: Kintex 7 160T

    Question 4: Does the PXIe-7820R support LabVIEW FPGA?
    Answer 4: Yes

    Question 5: What is the minimum I/O pulse width of the PXIe-7820R?
    Answer 5: 6.25 ns